Output circuit

  • Inventors: YAMADA SUKETAKA
  • Assignees: Nec Corp
  • Publication Date: December 09, 1991
  • Publication Number: JP-H03278114-A

Abstract

PURPOSE: To easily inquire into and investigate the case of abnormality of the output circuit and a malfunction, etc., of a circuit of the post stage by detecting and outputting the level of noise mixed into a power unit supply line by a noise detecting circuit provided with plural inverter circuits whose input threshold voltages are different. CONSTITUTION: Input threshold voltages of inverter circuits 31A - 31C are set to, for instance, 1.0V, 1.5V, and 2.0V. In such a state, in the case turn-on/turn- off, etc., of output buffer circuits 11 - 1n occur simultaneously, and a noise exceeding 1V is generated transiently in a power unit supply line 21, as for the inverter circuit 31A, since its input threshold value is 1.0V, its output is inverted and goes to '0'V (low level). This level is inputted by a flip-flop 32A, and a detecting signal DET 1 outputted through an output buffer 33 goes to '0'V, therefore, it is detected that the noise of a higher level than '1'V is generated. Therefore, it is informed to the outside that there is possibility of the generation of a malfunction in a circuit of the post-stage. In such a way, the cause of abnormality and a malfunction can be inquired into and investigated in a short time and easily. COPYRIGHT: (C)1991,JPO&Japio

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